DRAM-Native &|~ Classification

Fashion-MNIST — The Trap Is Broken

DRAM-Native Bit-Logic Benchmark — 2026-08-19

The 91% trap is BROKEN. Beam 20 --max + filter eval gt 20% reaches 92.96% on Fashion-MNIST. Every search strategy lands in the 88.7–92.96% range — the 91% trap is BROKEN. The ceiling is architectural (frozen random W0 + maj1 voting, no convolution, no trainable features), not a search or diversity problem. What speaks for us: speed — a 221-member sweep runs in ~1 minute, orders of magnitude faster than CNN training.

1. The 91% Trap

Strategyeval rangeWhat we tried
--beam 10 --max (plain)90.8–91.6%H32..512, maj1-thresh 98..108
--tries N --tries-no-lock91.3–91.6%full-pool search, best-of-N
--tries 3 + bestN 1/2/391.4–91.5%per-try candidate offset
--tries-random-seed91.3–91.4%splitmix64 seeds
--optimal (2-opt exchange)1-swap-stable, zero gain
--expansion-sort clarity86.8–89.2%member clarity (WORSE)
--greedy90.2–90.8%single path
Bit-Voting (no W0, no maj1)88.7–89.0%lower technology bound

The honest assessment: we play in the amateur league on accuracy — Fashion-MNIST SOTA (CNN) is 94–96%, we sit at ~92.96%. The 2.1pp gap is architectural, NOT a search or diversity problem — every lever we pull moves the needle by tenths of a percent only.

What speaks FOR us: SPEED. The PRF trainer does a 221-member sweep in ~1 minute, orders of magnitude faster than CNN training. For a DRAM-native bit-logic chip, the question is not "can we reach 95%" but "how little hardware do we need for 92.96%".

2. Leaderboard (all runs, INT32 bit-exact)

Top results per corpus/mode — --beam 10 --max unless noted. The lr= field carries the winning --beam-bestN (reproducibility). Differences <0.1pp are within noise.

Hm1tevalerrMembersMode
51210592.96%70459--beam 20 --max --filter eval gt 20%
51210592.96%70459+ --filter eval gt 83%
51210592.96%70459+ --filter eval gt 84%
51210592.80%72032--beam 10 --max
25610592.51%74942--beam 10 --max
19610592.47%75340--beam 10 --max
51210592.59%74119--beam 20 --filter eval gt 30 --tries 5 --tries-no-lock
19610791.45%85559+ --tries 5 --tries-no-lock
19610591.44%85636+ --optimal
25610591.43%85755+ --tries 5 --tries-random-seed
19610591.41%85956--max --tries 3 (bestN=1)
51210591.38%86217--beam 10 (strict)
19610691.34%86639--beam 10 --max
19610791.34%86657--max --min-gain 0
19610791.33%86756--beam 10 --max
19610891.30%87057--beam 10 --max
19610491.20%88058--beam 10 --max
12810591.18%88243--beam 10 --max
1969890.91%90935--beam 10 --max (true half)
6410590.82%91866--beam 10 --max
3210589.70%103027--beam 10 --max
BV88.94%110617--beam 10 --max (no W0)

Ceiling: ~92.96% (H=512). The H dimension is fully measured and flat (+0.14pp from H196→H512). The 91% trap is BROKEN — beam 20 --max + filter eval gt 20% → 92.96%.

3. The Speed Argument

The PRF trainer (mlp-bin32-otto-trn-seq-prof.c, N members in parallel, 1 thread each) makes sweeping blazing fast:

TaskTime
Full member sweep (221 members: 17 xforms × 13 encodings)~1 min
Merge beam search (1885–2093 archives)3–60 s
Bit-Voting sweep (lower-bound research)~1 min

Compare: a CNN epoch on Fashion-MNIST takes minutes to hours on a GPU. The DRAM-native bit-logic approach trades accuracy (~92.96% vs 94–96%) for hardware simplicity + speed that no CNN can match on-chip. For a DRAM-native chip, the question is not "can we reach 95%" but "how little hardware do we need for 92.96%".

4. maj1-thresh Calibration

--maj1-thresh is a sharp calibration point. The auto value is 107 for n=196 — but the merge attractor peaks at 105. Lower thresh → fewer members at equal/better eval: 105 gives 36 members vs 56 at 107.

m1tbeam10beam10 --maxmemberserr
98 (=n/2)90.73%90.91%35909
10490.99%91.20%58880
10591.04%91.44%36856
10691.11%91.34%39866
107 (auto)90.86%91.33%56867
10890.84%91.30%57870

5. Ensemble Search Findings

FindingEvidence
the 91% trap is BROKEN--beam 20 --max --filter eval gt 20% reaches 92.96%; the basin is 88.7–92.96%, the ceiling is architectural (frozen random W0 + maj1), not search-limited
--tries is pool partitioningTRY 2..10 lock found members; --tries 10 == --tries 1
--tries-no-lock enables full-pool searcheach try gets a fresh pool → different seeds, same-space attractors
--beam-bestN N breaks 1st-best fixationper-level selection starts at the N-th best candidate; bestN=3 single run: 91.16 vs 90.94 (bestN=1)
--min-gain 0 is a real lever867→866 (57 members) on Otto, 1106→1105 (24) on BV
--optimal (2-opt) is a dead end1-swap-stable attractor — no improving single swap
--member-start = monotone pool extensionbeam starts from a saved attractor (floor) — new members can only ADD, never redirect below it
clarity (class-score std-dev)--expansion-sort clarity + --greedy-clarity; DIVERSITY beats pure clarity
beam is NOT pool-monotoneadding 312 shuffle members WORSENED 6/10 corpora — MORE members ≠ better

6. Reproducible Reference Run

The best result to date (scores-H512-E10-OT8-M1-105-INT32, --beam 20 --max --filter eval gt 20%) reaches 92.96% with 59 members in the merge search. The --member-out file feeds the IFC delivery path (export → model.otto → import). The v8 model is self-describing: the import reads maj1-thresh=105 from the model itself (bugfix 2026-08-09 — before, the import fell back to CLI defaults and lost ~50pp). The IFC-verified H512 model currently in the log is the 55-member export at 92.95%:

StepConfigevalerrMembers
Merge search (best)scores-H512-E10-OT8-M1-105-INT32 --beam 20 --max --filter eval gt 20%92.96%70459
Retrain (IFC export)--member-file member-H512-E10-OT8-M1-105-INT32.out --export-default92.95%70555
IFC inference--import export-H512-E10-OT8-M1-105-INT32 --evalN 10000 (no CLI flags)92.95%70555
Merge search (m1t=105, H196)scores-H196-E10-M1-105-INT32 --beam 5 --filter @91.10%89016
Retrain (m1t=105)--member-file fashion-105.member --export model/91.10%90916
IFC inference (m1t=105)--import model/ --evalN 10000 (no CLI flags)91.10%89016
alt.scores-H196-E10-M1-104-INT32 --beam 10 --filter not shuffle91.09%89114
alt.scores-H196-E10-M1-106-INT32 --beam 1091.11%88921

IFC-verified: 55 members, 92.95% — zero train-merge gap. The retrained members (92.95%) and the IFC inference (92.95%) are identical: the v8 model carries the exact maj1-thresh=105 calibration and the trainer runs MODE_INT32 (bit-exact, chip-faithful). The best merge search (92.96%/59) is one member set beyond the currently exported model — the 92.95%/55 export is the verified chip delivery.

7. Technology Boundary

Bit-Voting (-DKI_BITVOTING, identity W0, direct pixel-bit → class) is the lower technology bound for the DRAM chip: no W0, no majX. Its sweep is blazing fast (221 members in ~1 min with the PRF trainer).

Runmembersevalerr
--beam 10 --max1788.94%1106
--beam 10 --max --min-gain 02488.95%1105